Aaeon TKS-G21-CV05 Manuel d'utilisateur télécharger pdf (Page 41)

Embedded Box TKS-G21-CV05

Appendix A Programming the Watchdog Timer A-2

A.1 Programming

TKS-G21-CV05 utilizes ITE 8783 chipset as its

watchdog timer controller. Below are the procedures to complete

its configuration and the AAEON initial watchdog timer

program is also attached based on which you can

develop customized program to fit your application.

Configuring Sequence Description

After the hardware reset or power-on reset, the ITE 8783 enters the

normal mode with all logical devices disabled except

KBC. The initial state (enable bit ) of this logical device (KBC) is

determined by the state of pin 121 (DTR1#) at the falling edge of

the system reset during power-on reset.

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Aaeon TKS-G21-CV05 Manuel d'utilisateur Page 41